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VEC106: Maximizing FPGA Design Productivity
You will learn the best ways to maximize productivity throughout the FPGA design cycle, while also maximizing design performance. Using recommended design methodology as a framework, you will see what is involved in preparing an FPGA design and what is required to implement it - from the creation of the design specification all the way to final sign-off. Examples will be used throughout the course to provide a reference point for implementing high performance FPGA designs. These include the use of Altera devices and tools, namely Quartus® II software, for maximizing your productivity.